Agilent Technologies N4962A Guia do Utilizador descarregar pdf (Página 40)

Operation

Serial BERT 12.5 Gb/s User Guide

Text

Type

Description

Default

Adjust

UP and DOWN

buttons

Buttons adjust BER clock phase

by 2 degrees

from 5 to 12.5 GHz

, and in 90-degree increments

below 5 GHz:

• UP increases phase offset (max 358,

min 0)

• DOWN decreases phase offset

Display will briefly show new clock phase setting

after pressing either button

, and then switches

back to previously

-displayed setting.

0 degrees

Adjust

Config

State

PLUS and MINUS

buttons

Buttons adjust the value of the currently

displayed Config State (use the Display

->Scroll

buttons to select the current state):

• PAT 2E31

o options: 2E31, 2E23, 2E15, 2E10, 2E7

PRBS output pattern length setting, where

pattern lengths are

1, and n has a value in [31,

23, 15, 10, 7]. 2

-1 is the longest pattern, and

repeats every 0.2 seconds at a clock speed of

GHz.

• MS 0.500

o options: 0.500, 0.250, 0.125

PRBS output mark space density setting, which is

the ratio of logic 1’s to the total of logic 1’s and

logic 0’s. A mark space density of 0.5 (1/2)

indicates an equal number of 1’s and 0’s.

• Jitter 0

o options: 0, 1

Jitter injection mode se

tting: 0 for normal

operation, 1 for jittered operation. This setting is

for optionally applying the DC

-100 MHz jitter

input signal. When 1, the modulator bandwidth is

increased to allow the jitter input to be FM

modulated onto the clock signals. The jitter added

is proportional to the amplitude of the jitter i

nput

signal

. For low jitter operation, set the Jitter

command to 0, and remove any signal from the

PAT 2E31

MS 0.500

Jitter 0

Synth 1

Err00000

ErAd OFF

NoData 0

1234R567

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 87 88

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