Agilent Technologies ESG Guia do Utilizador Página 461

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
Vista de página 460
Chapter 15 445
W-CDMA Uplink Digital Modulation for Receiver Test
W-CDMA Uplink Concepts
DPCH Synchronization
Figure 15-64 illustrates the timing alignment for the DPCH channel. Delay time is defined by
the sum of T0 (1024 chips = the standard timing offset between downlink and uplink), timing
offset, and timeslot offset.
Figure 15-64 DPCH Synchronization - Frame Timing Alignment
Vista de página 460
1 2 ... 456 457 458 459 460 461 462 463 464 465 466 ... 501 502

Comentários a estes Manuais

Sem comentários