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Document Revision History Page 11

December 2010 Altera Corporation Using the Agilent 3070 Tester for In-System Programming in Altera CPLDs

■ To save time and disk space, generate the .svf files that include a verify in the

programming operation. This process integrates verification vectors into one step,

minimizing the amount of work in the test development process. This integrated

verify accurately captures any programming errors; therefore, it is not necessary to

add an additional stand-alone verify in the test sequence.

■ While this document describes how to generate a test to apply vectors to the

device for programming, you will need a boundary-scan description language

(BSDL) file to test the device functionally. To perform a boundary-scan test or

functional test, generate a BSDL file for the programmed state of the target device

that contains the pin configuration information (for example, which pins are

inputs, outputs, or bidirectional pins). Use the Agilent 3070 boundary-scan

software to generate the test.

f For more information about boundary-scan testing support, refer to the IEEE 1149.1

(JTAG) Boundary-Scan Testing for MAX II Devices chapter in the MAX II Device

Handbook or the JTAG Boundary-Scan Testing for MAX V Devices chapter in the MAX V

Device Handbook.

Document Revision History

Tab le 1 lists the revision history for this application note.

Table 1. Document Revision History

Date Version Changes

December 2010 1.0 Initial release.

1 2 ... 6 7 8 9 10 11 12

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Agilent Technologies 3070 Manual do Utilizador Página 11