Page 10 Programming Times
Using the Agilent 3070 Tester for In-System Programming in Altera CPLDs December 2010 Altera Corporation
The advantages of using the Agilent PLD ISP software over the svf2pcf flow for
device programming are:
■ The tester can support the programming of devices with an .svf file, Jam
™
Standard Test and Programming Language (STAPL) Format (.jam) file, or Jam
Byte Code (.jbc) file directly (that is, no conversion to .pcf or VCL files).
■ The Agilent 3070 digital test used to program a device is only one file.
■ Pull-up and pull-down resistors are not required on the
TCK
and
TMS
lines because
the device programming executes as one test.
■ The size of the digital test source file and the compiled object file is much smaller
than with the svf2pcf solution.
■ Execution time for larger CPLDs and configuration devices is faster because you
only execute a single digital test file.
Jam Byte-Code Player
With the Agilent PLD ISP software, a Jam Byte-Code Player is implemented in the
Control XTP card of the tester. This allows you to program your devices with .jbc files
generated from the Quartus II software. The tester also supports .jam and .svf files by
using a JBC compiler to compile these files for programming. The Jam Byte-Code
Player is executed through the micro controller on the Control XTP card and allows
you to apply vectors algorithmically rather than executing a sequence of vectors. The
Jam Byte-Code Player reads the programming and erase pulse width registers of the
devices and uses those values to the programming and erase algorithms.
Programming Times
Programming times on the Agilent 3070 tester are very consistent. The only variable is
the TCK frequency, which affects the programming times because the programming
time is a function of the TCK clock rate. The faster the clock, the less time is required to
shift data into the device. MAX II and MAX V devices support TCK clock rates up to
18 MHz.
Guidelines
When using the Agilent 3070 tester for programming, follow these guidelines:
■ Use caution if you use a pin library to describe the target device in a stand-alone
boundary-scan chain. Altera does not recommend describing all of the ISP device
I/O pins as bidirectional. This practice uses a large number of hybrid card
channels and potentially causes a fixture overflow error when developing the test.
■ Do not include .pcf file vectors in the test library. Use a setup-only node library.
Creating a test library with the .pcf file vectors creates a large library object file and
results in slower test development time. This delay occurs because the integrated
program generator looks at the entire vector set of the library object to determine if
vectors must be commented out due to conflicts. Library object compiles are
different from executable compiles. Additionally, the integrated program
generator might fail due to the large library object file.
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