Agilent Technologies 8000 Series Manual do Utilizador descarregar pdf (Página 6)

A quick tour of the application (continued)

Setup complete: Make measurements

Quickly change which signal bank

is routed to the MSO. A single

mouse click tells the ATC2 core

to switch to the newly specified

signal bank without any impact

to the timing of your design. To

make measurements throughout

your FPGA, change signal banks

as often as needed. User-definable

signal bank names make it

straight forward to select a part of

your design to measure.

Correlate internal FPGA activity with

external measurements

View internal FPGA activity and

time-correlate internal FPGA

measurements with external

analog and digital events in

the surrounding system. FPGA

Dynamic Probe unlocks the power

of the MSO for system-level debug

with FPGAs.

Make state measurements

with your MSO

MSOs incorporate some logic

analysis state capabilities useful

for making FPGA measurements.

Using pattern trigger, setup a

state trigger on ATC2 clock

output edge and desired digital

pattern. After acquiring the data,

use the post-processing “State

clock” feature to transform the

timing waveforms into state wave-

forms. Valid states are shown and

invalid states are filtered. Any of

the 16 digital channels or any of

the analog channels can be set as

the state clock. Using an analog

channel state clock allows you to

retain all 16 digital channels for

bus measurement.

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