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Source No Pre-emphasis Level Verification Testing 7

U7232A DisplayPort Compliance Testing Notes 69

PASS Condition

The peak- to- peak voltage must fall within the following ranges for each

output level:

Output level 1 (0.4 V): 0.34 V ≤ Result ≤ 0.46 V

Output level 2 (0.6 V): 0.51 V ≤ Result ≤ 0.68 V

Output level 3 (0.8 V): 0.69 V ≤ Result ≤ 0.92 V

Output level 4 (1.2 V): 1.02 V ≤ Result ≤ 1.38 V

Test R ef er en ce s

See Test 3-2: No Pre-emphasis Level Verification Testing, in the

DisplayPort- Compliance Test Specification Version 1.

Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test.

Upper Threshold (Debug

only)

Sets the upper threshold used to make a rise time or fall time

measurement.

Lower Threshold (Debug

only)

Sets the lower threshold used to make a rise time or fall time

measurement.

Intra-pair Skew

Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.

AC Common Mode

AC Common Edge Sets the number of edges measured for the AC common mode test.

Table 8 Test Configuration Options

Configuration Option Description

1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 151 152

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Agilent Technologies DisplayPort Manual de Serviço Página 69