Agilent Technologies 16800 Series Manual do Utilizador Página 4

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Measurement setup step 3:
Import signal names
Tired of manually entering bus
and signal names on your logic
analyzer? The FPGA dynamic
probe application reads a .cdc file
produced by Xilinx Core Inserter.
The names of signals you measure
will now automatically show on
your logic analysis interface.
Measurement setup step 2:
Map FPGA pins
Quickly specify how the FPGA
pins (the signal outputs of
ATC2) are connected to your
logic analyzer. Select your probe
type and rapidly provide the
information needed for the logic
analyzer to automatically track
names of signals routed through
the ATC2 core.
For ATC2 cores with auto setup
enabled, each pin of the ATC2
core, one at a time, produces a
unique stimulus pattern. The
instrument looks for this unique
pattern on any of its acquisition
channels. When the instrument
finds the pattern, it associates
that instrument channel with the
ATC2 output pin producing it. It
then repeats the process for each
of the remaining output pins
eliminating the need to manually
enter probe layout information.
Measurement setup step 1:
Establish a connection between
the analyzer and the ATC2 core
The FPGA dynamic probe
application establishes a
connection between the logic
analyzer and a Xilinx cable.
It also determines what devices
are on the JTAG scan chain and
lets you pick which one you wish
to communicate. Core and device
names are user definable.
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