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8 16800 Series Portable Logic Analyzers Service Guide
Contents
Prepare the Logic Analyzer for Testing 35
Perform System Self-Tests 36
Set Up the Test Equipment 37
Connect the Test Equipment 39
Connect the Logic Analyzer Pod to the 8133A Pulse Generator 39
Connect the 8133A Pulse Generator Output to the 54845A
Oscilloscope 40
Verify and adjust 8133A pulse generator DC offset 41
Deskew the oscilloscope 42
Set the 8133A pulse width 43
Configure the Logic Analyzer 45
Adjust the sample positions using eye finder 48
Test Pod 1 in 250 Mb/s Mode 52
Determine PASS/FAIL (1 of 2 tests) 52
Close the eye finder and Analyzer Setup dialogs 52
Configure the markers 52
Determine PASS/FAIL (2 of 2 tests) 54
Test the complement of the bits (250 Mb/s mode) 55
Test Pod 2 in 250 Mb/s Mode 57
Test the complement of the bits (Pod 2, 250 Mb/s mode) 58
Test Pods 3 and 4 in 250 Mb/s Mode 58
Test the Remaining Pods in 250 Mb/s Mode 59
Set up the second E5383A Flying Lead Probe Set 59
Test the remaining pods 59
Test Pod 1 in 500 Mb/s Mode 60
Determine and set eye finder Position (500 Mb/s mode) 61
Test the complement of the bits (Pod 1, 500 Mb/s mode) 63
Test Pod 2 in 500 Mb/s Mode 64
Set up the second E5383A Flying Lead Probe Set 64
Test Pod 2 in 500 Mb/s mode 64
Test the complement of the bits (Pod 2, 500 Mb/s mode) 65
Test the Remaining Pods in 500 Mb/s Mode 65
To re-assign pods reserved for time tag storage 66
Conclude the State Mode Tests 66
Performance Test Record 68
4 Calibrating and Adjusting
Calibration Strategy 70
- Agilent 16800 Series 1
- Portable Logic Analyzers 1
- Model Comparison 3
- Features, Logic Acquisition 3
- Features, Mainframe 4
- Features, Pattern Generator 4
- Supplied Accessories 4
- Optional Accessories: 4
- Service Strategy 4
- In this Service Guide 6
- 4 Calibrating and Adjusting 8
- 7 Replaceable Parts 10
- 8 Theory of Operation 10
- Contents 11
- General Information 13
- Accessories 14
- Specifications 15
- Characteristics 16
- Non-Operating Environment 17
- Dimensions 18
- Recommended Test Equipment 19
- 1 General Information 20
- Preparing for Use 21
- To inspect the logic analyzer 22
- To apply power 22
- To clean the instrument 23
- To start the user interface 23
- To test the logic analyzer 23
- 2 Preparing for Use 24
- Testing Performance 25
- To perform the power-up tests 26
- Logic Analyzer Test Strategy 27
- 3 Testing Performance 28
- Testing Performance 3 31
- Equipment Required 34
- Perform System Self-Tests 36
- Set Up the Test Equipment 37
- Connect the Test Equipment 39
- Deskew the oscilloscope 42
- Set the 8133A pulse width 43
- Configure the Logic Analyzer 45
- Run eye finder 49
- To re-align a stray channel 50
- Test Pod 1 in 250 Mb/s Mode 52
- Test Pod 2 in 250 Mb/s Mode 57
- Test the remaining pods 59
- Test Pod 1 in 500 Mb/s Mode 60
- Test Pod 2 in 500 Mb/s Mode 64
- Conclude the State Mode Tests 66
- Performance Test Record 68
- Calibrating and Adjusting 69
- Calibration Strategy 70
- Troubleshooting 71
- Try , and then 75
- Power Supplies 84
- To run the self-tests 88
- Bit#: 39 - 16 15 - 8 7 - 0 92
- Clock Test 93
- Simple RAM Test 93
- RAM Persistence Test 94
- Marching Bits RAM Test 94
- Wait Test 94
- Instruction Interrupt Test 95
- To exit the test system 96
- 5 Troubleshooting 100
- Set up the test equipment 101
- Connect the test equipment 101
- Threshold 102
- Troubleshooting 5 109
- Clock Frequency of 100 MHz 111
- Click Run Rep 111
- Replacing Assemblies 113
- Replacement Strategy 114
- Tools Required 114
- To save the license file 115
- To power off the system 116
- Replacing Assemblies 6 117
- 6 Replacing Assemblies 118
- 600 watt power supply 119
- Secondary power supply 120
- 60 mm fan 144
- 92 mm fans 145
- Returning Assemblies 148
- FRAGILE 149
- Replaceable Parts 151
- Ordering Replaceable Parts 152
- System Replaceable Parts List 155
- Replaceable Parts 7 159
- • A — Assembly 163
- • MP — Mechanical Part 163
- • W — Cable 163
- Theory of Operation 167
- System Block Level Theory 168
- Module Interface Board (MIB) 169
- CPU Subsystem 170
- PCI board 171
- MIB (Module Interface Board) 171
- Module Bus FPGA(s) 172
- I/O FPGA 172
- Theory of Operation 8 173
- Front Panel Assembly 174
- Power Up Routine 175
- Product install 178
- Software recovery methods 178
- Self Test 179
- Comparators 181
- Acquisition IC 181
- Master/Expander Connectors 182
- Instruction Memory 183
- Data Memory 183
- Output Driver 184
- Clock Circuit 184
- CPU Interface 184
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