Agilent Technologies FS2010 Manual do Utilizador descarregar pdf (Página 2)

SPI Bus Analysis is provided via an option to the

ALD-232A probe.

This solution provides a simple, easy to use, tool for

examining SPI transactions. A very flexible setup al-

lows all commonly used combinations of SPI parame-

ters to be easily entered by the user. The logic

analyzer display presents two columns of data, one

for each direction of flow. Since the data is presented

to the logic analyzer as bytes, all of the unique trig-

gering qualities of the analyzer can be utilized.

Simultaneous viewing of the timing in both data direc-

tions is also presented. The timing waveform also

displays a clock counter to enable easy interpretation

of the data bits.

I C Bus Analysis is provided via an Agilent Technol-

ogies logic analyser and option to the ALD-232A

probe.

· I

C bus serial information is displayed as parallel

bytes in state mode.

· Quickly determine the information content of I

transactions.

· View details of I

C bus timing with signal pass-

through mode

· View transaction duration in state mode using

time tags, or in timing mode Start- and stop- con-

ditions and byte boundaries are detected by the

analysis probe hardware and displayed in timing

mode

· View I

C symbolic address while in timing mode.

· Operates simultaneously in both timing and state

modes – no double-probing required.

· Operates non-invasively in real-time.

· Full data sheet available from EPN Solutions for

all Advanced Logical Design Inc (ALD) products.

Agilent Logic Analyzers Supported by the ALD

RS232D, RS449, IEEE1284, CAN SPI and I

C de-

bugging solutions:-

The ALD-232A bus analysis probe may be used with

all currently available 16700, 1680, 1690, 16800 and

16900 logic analyzer systems except the 16900 mod-

ules with 90 pin cable connectors (16950A/B,

16753A/4A/5A/6A and 16760A).

Two 17-channel pods are required.

Advanced Logical Design Inc Low Speed

Serial Analysis Solutions available from EPN

Solutions use Agilent Technologies Logic Analysers

to debug a range of low speed buses including:-

RS232D

RS449

IEEE 1284

The Advanced Logical Design ALD-232A analysis

probe provides a fast, easy and reliable method for

connecting the Agilent logic analyzers to the

RS232/449 or IEEE1284 busses. Configuration files

for both timing and state analysis are provided along

with a bus cycle interpreter/protocol decoder

displaying the full duplex data in all modes. For

timing analysis, all signals are presented to the logic

analyzer inputs with a minimum buffer delay and low

skew.

CAN Bus Analysis is provided via an option to the

ALD-232A a fast, easy and reliable way for design-

ers to view CAN transactions, locate hardware faults,

characterize software timing, verify performance

specifications, and successfully troubleshoot CAN

based systems.

CAN Protocol Decode

In conjunction with processor-specific support availa-

ble with Agilent logic analyzers, users can observe

time-correlated processor and bus activity. This solu-

tion provides a complete view of all CAN activity.

advanced

logical design, inc.

CAN

SPI

I C

1 2 3 4

EPN Update 1
Solutions 4

Comentários a estes Manuais

Sem comentários

Agilent Technologies FS2010 Manual do Utilizador Página 2

Comentários a estes Manuais