
Histogram Event Register (HER)
Bit 0 (COMP) of the Histogram Event Register is set when the Histogram
completes. The Histogram completion criteria are set by the
HISTogram:RUNTil command. The Histogram Event Register is read and
cleared with the HER? query.
When the COMP bit is set, it in turn sets the HIST bit (bit 9) of the Operation
Status Register. Results from the Histogram Register can be masked by using
the HEEN command to set the Histogram Event Enable Register to the value
0. You enable the COMP bit by setting the mask value to 1.
Arm Event Register (ARM)
This register sets bit 5 (Wait Trig bit) in the Operation Status Register and
the OPER bit (bit 7) in the Status Byte Register when the instrument
becomes armed.
The ARM event register stays set until it is cleared by reading the register
with the AER? query or using the *CLS command. If your application needs
to detect multiple triggers, the ARM event register must be cleared after each
one.
If you are using the Service Request to interrupt a program or controller
operation when the trigger bit is set, then you must clear the event register
after each time it has been set.
Status Reporting
Histogram Event Register (HER)
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